The present disclosure relates to semiconductor devices and a method for fabricating the same, and more particularly, to vertical type nonvolatile memory devices and methods for fabricating the same.
Higher integration of semiconductor devices is desired for satisfying consumer demands for superior performance and cost reduction. In the case of semiconductor memory devices, heightened integration is especially important, since integration is an important factor in determining product price. In the case of typical two-dimensional, or planar, memory semiconductor devices, since their integration is primarily determined by the circuit area occupied by a unit memory cell, integration is greatly influenced by the ability to form fine patterns. However, since extremely expensive semiconductor equipment is required for further advancement of pattern fineness, further integration of two-dimensional memory devices is impractical.
As an alternative to address the limitations associated with two-dimensional devices, three-dimensional semiconductor memory devices have been proposed. However, to realize the mass production of three-dimensional semiconductor memory devices, process technology that can decrease fabrication cost per bit, yet can realize reliable product characteristics, is required.